I support teams in building efficient, hardware-ready ML pipelines. Model optimization, FPGA acceleration, and reproducible engineering practices, replacing ad-hoc steps with clear, validated workflows.
Refactor and optimize models to reduce latency, memory, compute, or footprint while keeping performance under control. Quantization, pruning, distillation, and architectural tuning.
Guide the pipeline that takes your models from research environments into FPGA or edge devices, using clean, reproducible workflows.
Translate algorithms into high-performance hardware using High-Level Synthesis. Pipeline design, memory architecture, parallelization strategies, and optimization for timing and throughput.
Structure your ML-to-hardware processes, tools, and responsibilities so teams can move with clarity instead of ad-hoc scripts.
Combine tailored training with project-focused consulting: learning while building something real.